서강대학교

초록/요약 도움말

This article presents a single-trim switched capacitor (SC) CMOS bandgap reference (BGR) for battery monitoring applications. For a single-temperature trimming, beta-compensation and curvature correction techniques are employed to minimize non-proportional-to-absolute-temperature (PTAT) errors. In conjunction with these techniques, this article proposes dynamic element matching (DEM) techniques with low-pass filtering which employs the decimation filter of a delta-sigma analog-to-digital converter (ADC) in a digital domain. It achieves a further reduction of non-PTAT errors resulting from mismatches of the bias current, of the PNP transistor current gain (beta), and of the gain coefficient in the SC summing amplifier. The remaining PTAT errors are canceled out using a single room-temperature trimming. The bandgap circuit is implemented using vertical PNP transistors with a beta of about 2.7 at 27 degrees C in a 0.18-mu m CMOS process. The proposed SC BGR achieves a 3 sigma inaccuracy of +0.02%, -0.12% from -40 degrees C to 125 degrees C. From a 1.8-V supply voltage, it consumes 17 mu A at 27 degrees C and occupies an active area of 0.38 mm(2).