A 4H-SiC MOSFET Embedded Polysilicon/SiC Heterojunction Diode with Electric Field Protection Region
- 주제어 (키워드) SiC-MOSFET , Heterojunction diode , Electric field protection , Maximum oxide electric field , Baliga’s figure-of-merit , drain induced barrier lowering , High-frequency figure-of-merit
- 발행기관 서강대학교 일반대학원
- 지도교수 김광수
- 발행년도 2022
- 학위수여년월 2022. 2
- 학위명 석사
- 학과 및 전공 일반대학원 전자공학과
- 실제 URI http://www.dcollection.net/handler/sogang/000000066397
- UCI I804:11029-000000066397
- 본문언어 영어
- 저작권 서강대학교 논문은 저작권 보호를 받습니다.
초록 (요약문)
In this paper, A novel 4H-SiC MOSFET embedded polysilicon/SiC heterojunction diode (HJD) with an electric field protection (EFP) region is proposed using a numerical TCAD simulation. The proposed device features HJD located at the trench side wall in the middle of the junction field effect transistor (JFET) region and a P+ EFP region under the P-type polysilicon to achieves excellent device performance and high reliability. The results show that the Baliga’s figure-of-merit (BFOM) and the maximum oxide electric field (EMOX) improved by 12% and 54%, respectively, compared with the conventional 4H-SiC MOSFETs (C-MOSFETs). The proposed device shows excellent DIBL suppression and low leakage current of HJD due to the shielding effect of the EFP. The HJD effectively suppressed the activation of the parasitic PiN diode owing to its low turn-on voltage (VF = 1.75 V). In addition, the HJD-MOSFET demonstrated superior reverse-recovery performance, thereby improving reverse recovery time (trr) and reverse recovery charge (Qrr) by 35% and 57%, respectively, compared with C-MOSFET. Furthermore, the parasitic input capacitance (CISS) was decreased by 17.5%, and CGD was decreased by 96%. Therefore, the high-frequency figure-of-merit (HFOM) improved by a factor of 25.8 in terms of RON × CGD. As a result, the HJD-MOSFET is a promising device for high-reliability and high-frequency applications.
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