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Terahertz CMOS on-chip antenna using defected ground structure

초록/요약

In this paper, a V-shaped patch antenna with defected ground structure is proposed at terahertz, in order to overcome the limited performance of a standard CMOS on-chip patch antenna consisting of several metal layers and very thin inter dielectric layers. The proposed V-shaped patch with slots allows the increased radiation resistance and broadband performance. In addition, the resonant patch is stacked on the V-shaped patch for multiple resonances. More importantly, the slots are formed in the ground plane, what is called defected ground structure, to further increase the radiation resistance and thus improve the bandwidth and efficiency. It is verified from the electromagnetic simulation that the leakage waves by defected ground can improve the antenna gain by coherently interfering with the topside radiation. It is also proved from the simulation that the probe tip used in the on-wafer measurement can increase the directivity of the antenna and thus reduce the radiation resistance. The proposed on-chip antenna is fabricated using a standard 65 nm CMOS process. The measurement shows very wide bandwidth of input return loss (> 10 dB) greater than 28.7% from 240 to >320 GHz. The corrected radiation efficiency is greater than 10% from 270 to 318 GHz (16.3% fractional bandwidth) with a maximum of 27.1% at 295 GHz. The corrected gain and directivity are 4.15 and is 9.8 dB, respectively, at 295 GHz. These results belong to the best performance among the terahertz CMOS on-chip antennas without using additional components or processes such as dielectric resonators, lens, or substrate thinning.

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