서강대학교

초록/요약

SiC (Silicon carbide) is a WBG (Wide band gap) material and has been attracting attention as a next-generation power semiconductor device material because it has superior physical properties (10 times superior critical electric field, high thermal conductivity, and resonable electron mobility, etc.) compared to Si (Silicon). These physical merits are very suitable to replace silicon power semiconductor devices, and the realization of power semiconductor devices using SiC has been studied in many groups. In this thesis, I will describe the fabrication of VD(Vertical Double-diffuse)-MOSFET using 4H-SiC. The VD-MOSFET to be fabricated is aimed at a breakdown voltage of 1700V and a maximum continuous current of 30A class. This thesis consists of 5 chapters, and the chapters are as follows. In chapter 1, the basic properties of SiC (Silicon Carbide) were described. SiC is widely used as a bandgap material in the power semiconductor area. SiC has various polytypes depending on the growth methods. In the initial power semiconductor device field, we have been studying devices using polytypes such as 3C, 6H-SiC, etc. However, because of the high voltage and high current required in the power semiconductor field, 4H-SiC is widely used because of its wide band gap and excellent properties such as electron mobility and thermal conductivity. In chapter 2, 4H-SiC VD-MOSFET was designed using TCAD (Technology Computer Aided Design) and the characteristics of that were predicted. We set wafer conditions suitable for the target breakdown voltage of 1700V. The drift region was determined to be 5E15cm-3 and 14um, assuming a punch-through type. We simulated the edge termination to reach the desired breakdown voltage and determined the design conditions to achieve 90% of the ideal junction breakdown. Also, the device design conditions of 4H-SiC VD-MOSFET such as P-body, channel length, JFET width variation, etc were also optimized by simulation. The masks were designed using the process parameters obtained from the simulation and a total of 12 masks were used. In chapter 3, the defects that occur in the insulator-semiconductor system will be explained. In particular, the interface trap density (Dit), which has the greatest influence on the fabrication of 4H-SiC MOSFETs, will be discussed in detail. Among the various methods of measuring Dit, the high-low method will be discussed. The results of the Dit measurement of the fabricated 4H-SiC MOS capacitor will be analyzed using the corresponding measurement method. In particular, for the improvement of the Dit, re-oxidation process was proposed after N2O direct oxidation and a low value of 3.17E11cm-2eV-1 (at 0.2eV) was achieved. In chapter 4, the process of fabricating the targeted 4H-SiC VD-MOSFET is described using the above device design conditions and the oxidation process. 4H-SiC VD-MOSFET requires short channel length due to low channel mobility. Therefore, a channel length of about 0.5μm was achieved by carrying out self-align unit process experiments. In order to prevent out diffusion of the dopant in the high temperature annealing process, graphite unit process was performed to set the desired conditions. In chapter 5, 4H-SiC MOSFETs were fabricated in a 6-inch wafer using the designed mask and fabrication process, and the electrical characteristics of the devices were measured. 4H-SiC MOSFET devices were measured at wafer level and package level. As a result, a breakdown voltage of 1700V or more, VTH=6.3V (@25℃), 4.3V (@150℃) Rsp,on=320mΩ-cm2 (@25℃) and 48mΩ-cm2 (@150℃) were achieved.