서강대학교

초록/요약

This paper discusses the bandwidth and efficiency enhancement of an on-chip patch antenna using 65-nm CMOS technology. V-shaped patch antenna with slots, which have a reduced chip area compared with the standard rectangular patch antenna, is selected as a basic terahertz patch antenna. An additional patch is stacked on top of it to generate multiple resonances for wide bandwidth. The bandwidth and radiation efficiency of the proposed patch antenna is improved additionally by placing slots on the ground plane because it makes effectiveness thicker thickness of dielectric substrate with additional resonance at the silicon substrate. The simulation result shows that the proposed patch antenna achieves the bandwidth of 10-dB return loss of 24.5% and radiation efficiency of 38.3% at 300 GHz with smaller chip area compared with the standard patch antenna. A spherical scanner, which is designed to measure the far-field characteristics of gain, radiation pattern, directivity, and radiation efficiency are also proposed using the far-field condition set-up on the probe station. The proposed patch antenna, which is V-shaped patch antenna with stacked resonator, is measured on-wafer probing from 220 to 325 GHz. The measurement result shows that s-parameter of the proposed patch antenna is better than -10 dB from 275 to 292 GHz, which corresponds to the fractional bandwidth of 6.3%. The proposed patch antenna also achieves a gain of –2.9 dBi, directivity of 5 dBi, and radiation efficiency of 17.4% at 280 GHz.